|
Number
|
Year
|
Location
|
Publication
|
Title
|
|
37 |
2022 |
Taiwan |
IEEE A-SSCC 2022 |
A 6 Gbps PAM-3 Transceiver with Time-Varying Offset Compensation |
|
36 |
2022 |
Italy |
IEEE ESSCIRC 2022 |
A 2.5 GHz 104 mW 57.35 dBc SFDR Non-linear DAC-based Direct-Digital Frequency Synthesizer in 65 nm CMOS Process |
|
35 |
2022 |
France |
IEEE ISICAS 2022 |
A 2.5 GS/s 7-bit 5-way Time-Interleaved SAR ADC with On-Chip Background Offset and Timing-Skew Calibration |
|
34 |
2022 |
USA |
IEEE ISCAS 2022 |
A 0.5 V 10 b 3 MS/s 2-Then-1b/Cycle SAR ADC With Digital-Based Time-Domain Reference and Dual-Mode Comparator |
|
33 |
2021 |
Korea |
IEEE A-SSCC 2021 |
A 3.2 GHz 178fsrms Jitter Injection Locked Clock Multiplier Using Sub-Sampling FTL and DLL for In-Band Noise Improvement |
|
32 |
2019 |
Poland |
IEEE ESSCIRC 2019 |
A 213.7-μW Gesture Sensing System-on-Chip with SelfAdaptive Motion Detection and Noise-Tolerant OutermostEdge-Based Feature Extraction in 65-nm |
|
31 |
2019 |
New Zealand |
IEIE ICEIC 2019 |
2.4 GHz Fractional-N Sub-Sampling PLL with a Hybrid Type Phase Interpolator |
|
30 |
2019 |
New Zealand |
IEIE ICEIC 2019 |
Improved Implementation Method of DPWM for NTV DC-DC Converter in 65nm CMOS |
|
29 |
2018 |
Taiwan |
IEEE A-SSCC 2018 |
A 137-μW Area-Efficient Real-Time Gesture Recognition System for Smart Wearable Devices |
|
28 |
2018 |
USA |
IEIE ICEIC 2018 |
A 12-bit 200-MS/s Pipelined ADC with Improved Settling Time of Amplifier in 0.13μm CMOS |
|
27 |
2018 |
USA |
IEIE ICEIC 2018 |
A 10Gbps 2-tap pre-emphasis technique for current-mode logic driver in 55nm CMOS |
|
26 |
2018 |
USA |
IEIE ICEIC 2018 |
A 25Gbps Source Series-Terminated (SST) transmitter in 55nm CMOS Technology |
|
25 |
2018 |
USA |
IEEE ISSCC 2018 |
Multi-way interactive capacitive touch system with palm rejection of active stylus for 86” touch screen panels |
|
24 |
2018 |
Italy |
IEEE ISICAS 2018 |
A 12-bit Multi-Channel R-R DAC Using a Shared Resistor String Scheme for Area-Efficient Display Source Driver |
|
23 |
2018 |
Korea |
대한전자공학회 추계학술대회 2018 |
12 Bit의 저전력 전류 모드 디지털-아날로그 변환기를 위한 저전력 Dynamic Element Matching 기법 |
|
22 |
2017 |
USA |
IEEE ISSCC 2017 |
A 3.9kHz-frame-rate capacitive touch system with pressure/tilt angle expressions of active stylus using multiple-frequency driving method for 65″ 104×64 touch screen panel |
|
21 |
2017 |
Korea |
제24회 한국반도체학술대회 (KCS 2017) |
10Gbs Serial-link Transmitter for 10G-EPON |
|
20 |
2017 |
Korea |
제24회 한국반도체학술대회 (KCS 2017) |
Pre-emphasis with Capacitive Peaking Technique for 10-Gb/s Serial-Link Transmitter |
|
19 |
2017 |
Korea |
대한전자공학회 SoC학술대회 2017 |
UBS 방법을 적용한 태양광 모듈 MPPT 기법 |
|
18 |
2017 |
Korea |
대한전자공학회 하계종합학술대회 2017 |
10Gbps 클록 데이터 복원기를 위한 카운터 기반 락 검출기 구현 |
|
17 |
2017 |
Korea |
ITC-CSCC 2017 |
Energy efficient spread second capacitor capacitive-DAC for SAR ADCs |
|
16 |
2016 |
Korea |
대한전자공학회 하계종합학술대회 2016 |
10Gbps Deserializer 재정렬 플립플롭을 이용한 뱅뱅 위상 검출기 |
|
15 |
2015 |
Singapore |
IEIE ICEIC 2015 |
A 9-bit CMOS DDFS with Area and Power Efficient Architecture |
|
14 |
2015 |
Korea |
제22회 한국반도체학술대회 (KCS 2015) |
A 10-bit single-ended SAR ADC for multiple-channel neural recording system |
|
13 |
2014 |
Korea |
ITU 2014 |
A Low-Power Multi-Channel 10-bit ADC for Structural Health Monitoring System of Civil Structures |
|
12 |
2014 |
Korea |
대한전자공학회 하계종합학술대회 2014 |
SIDO구조의 DC-DC boost converter를 위한 cross regulation 감쇠 방법 |
|
11 |
2014 |
Korea |
대한전자공학회 하계종합학술대회 2014 |
빠르게 변화하는 환경에 적합한 가변적인 힐 클라이밍 MPPT 방법 분석 |
|
10 |
2014 |
Korea |
대한전자공학회 하계종합학술대회 2014 |
지연 시간 교정 회로를 포함하는 비동기식 SAR ADC를 위한 내부 클럭 발생기 |
|
9 |
2014 |
USA |
IEEE ISSCC 2014 |
A 2GHz 130mW Direct-Digital Frequency Synthesizer with a Nonlinear DAC in 55nm CMOS |
|
8 |
2013 |
Korea |
제20회 휴먼테크논문대상 (The 20th Humantech Paper Award) |
A 2GHz 130mW Direct-Digital Frequency Synthesizer with a Nonlinear DAC in 55nm CMOS |
|
7 |
2013 |
Korea |
ITC-CSCC 2013 |
Low-Power Pipelined Phase Accumulator for High-Speed Direct Digital Frequency Synthesizers |
|
6 |
2012 |
Korea |
ITC 2012 |
A Low-Power High-Speed Pipelined Phase Accumulator with 2-Stage Pre-Skewing Registers |
|
5 |
2012 |
Korea |
ITC 2012 |
A Reference-Less 2.5 Gbps Half-Rate Burst-Mode Clock and Data Recovery for Optical Communication Systems |
|
4 |
2011 |
China |
IEEE ASICON 2011 |
A 10-Bit, 50 MS/s, 55 fJ/conversion-step SAR ADC with split capacitor array |
|
3 |
2010 |
USA |
IEEE SOVC 2010 |
A 1.3GHz 350mW hybrid direct digital frequency synthesizer in 90 nm CMOS |
|
2 |
2010 |
Korea |
제17회 휴먼테크논문대상 (The 17th Humantech Paper Award) |
A 1.5GHz 270mW direct digital frequency synthesizer using reshuffled current weight nonlinear DAC in 90nm CMOS |
|
1 |
2008 |
China |
IEEE APCCAS 2008 |
A 4GHz direct digital frequency synthesizer utilizing a nonlinear sine-weighted DAC in 90nm CMOS |
